Solid state imaging devices are well known. These devices find a widespread use in camera systems. In such application, a matrix of pixels comprising light sensitive elements constitutes an image sensor, which is mounted in the camera system. The signal of said matrix is measured and multiplexed to a video-signal.
Commonly solid state image devices are implemented in a CCD-technology or in a CMOS- or MOS-technology.
Among the image sensors implemented in a CMOS- or MOS-technology, CMOS or MOS image sensors with passive pixels and CMOS or MOS image sensors with active pixels are distinguished. An active pixel is configured with means integrated in the pixel to amplify the charge that is collected on the light sensitive element. Passive pixels do not have said means and require a charge-sensitive amplifier that is not integrated in the pixel and is connected with a long line towards the pixel.
There is an ongoing effort to increase the performance of CMOS or MOS image sensors such that a comparable image quality is obtained as the one obtained with high end CCD imagers. Due to the miniaturization of the technology of CMOS based electronic circuits, it is further possible to realize complex CMOS- or MOS-based pixels as small as CCD-based pixels. It is a main advantage of CMOS- or MOS-based image sensors that CMOS technology is being offered by most foundries whereas CCD-technology is rarely offered and a more complex and expensive technology option.
In the co-pending patent applications EP-A-0773667 and EP-97870084.7 pixel structures and methods of addressing them are described which yield, alone or in combination, the above-mentioned goals. The contents of these patent applications are incorporated herein by reference.
In general, it must be recognized that for an imaging device, three specifications that are difficult to match are to be met:
the sensitivity of the image device, especially in the dark, PA1 the cosmetic quality of the image (this means that the image should be flawless), and PA1 the requirement of a response with a high dynamic range. PA1 after a first time period, said first switch is opened thereby storing a first number of said charge carriers on said memory element and creating a first signal; PA1 and after a second time period, a second number of said charge carriers is stored on said output node creating a second signal, said read-out signal being a combination of at least said first and said second signals. PA1 after said second time period, creating a first intermediate signal from said first signal, PA1 thereafter opening and closing said first switch thereby creating a second intermediate signal, and; PA1 combining at least said first and said second intermediate signals in order to obtain said read-out signal. PA1 a photosensitive element for converting electromagnetic radiation into charge carriers and being connected to a reset switch and to a supply voltage; PA1 a memory element being connected to an amplifier, and PA1 a first switch in-between said photosensitive element and said memory element, said first switch being opened causing a first number of said charge carriers being stored on said memory element.
Image sensors having a nonlinear response such as a logarithmic response are known from, e.g., EP-A-0739039.
However, most of the image sensors with passive or active pixels show a linear voltage-to-light response. This means that their dynamic range is limited by the dynamic range of the linear response. For instance, if the linear output voltage has an S/R ratio of about 250 (which is a typical value) the corresponding dynamic range will be the same.
Image sensors with a double linear response or multiple linear response are known. In such sensors, two or more linear pieces of optical response are combined in one electrical output signal, outside the pixel. Presently, the classical image sensors can be used to obtain such double linear response image by capturing two images with different sensitivity and combining them.
Document U.S. Pat. No. 5,164,832 discloses a CCD-circuit having a response curve that has two sensitivity ranges. The CCD circuit has a clipping gate that is in a parallel configuration on the CCD. In order to obtain a response curve, the light integration period is split into a first and second integration periods. During the first integration period, the clipping gate is set to a specific DC voltage that removes the signals being generated by a high light intensity impinging on the CCD. During the second integration period, this limitation is removed. The high signals will only add to the result during the second period only, low signals will add all the time.
The collected photocharge during the first period of the integration time is limited, during the second period, the limitation is removed. This limitation that can be removed is obtained with a clipping gate that is set to one DC voltage during the first period, and to another during the second period. This said gate continuously removes charge that is in excess.